The present application relates generally to an improved data processing apparatus and method and more specifically to mechanisms for creating shift register definition from high-level model using high-level model simulation.
Design for Test (DFT) is a name for design techniques that add certain testability features to a microelectronic hardware product design. The premise of the added features is that they make it easier to develop and apply manufacturing tests for the designed hardware. The purpose of manufacturing tests is to validate that the product hardware contains no defects that could adversely affect correct functioning.
A scan chain is a technique used in Design for Test. The objective is to make testing easier by providing a simple way to set and observe every flip-flop in an integrated circuit (IC). When a scan enable signal is asserted, every flip-flop in the design is connected into a long shift register. One input pin provides the data to this chain, and one output pin connects to the output of the chain. Then, using the clock signal, a test device may enter an arbitrary pattern into the chain of flips flops, and read out the state of every flip flop.